Design and Implementation of BIST Architecture for Static Parameter of ADC

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Abstract

This paper provides a comprehensive analysis of On-Chip ADC BIST and compare it to the Off-Chip static parameter, which is the non-linearity of SAR ADC. It also evaluates the parameter i.e, INL, DNL offline using raw data names off-chip method which required some offline calculation to characterize the BIST circuit. whereas on-chip method does not require this kind of extra calculation in this method parameter evaluate in background and lock the pass/fail status in memory location. To demonstrate sufficient test accuracy also includes both calibrated and uncalibrated data for ADC. An algorithm known as USER-SMILE (ultra-fast segmented stimulus error identification algorithm) that is adopted in hardware unit to calibrate ADC, the solution has been tested for 12-bit SAR ADC in test vehicle project as well as General purpose project of 28nm automotive microcontroller. This solution enables the faster execution time and reduce tester time.

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Keywords

R2R DAC, SAR ADC, BIST, static linearity testing, DNL, USERSMILE algorithm unit, USMILE Algorithm unit